Dec.11_9:30_量子コンピューティングフォーラム

A full stack error corrected quantum processor with high-fidelity spin qubits requires expertise from various domains of semiconductor technology. Here, we employ Intel's advanced semiconductor ecosystem to demonstrate Exchange Only (EO) spin-qubits in Si/SiGe hetero-structures with 1Q and 2Q fidelities exceeding 99.9% and 99% respectively. Achieving high-fidelities is fundamentally enabled by the quality of materials, interfaces, and device fabrication, where defects, impurities, and interface roughness directly manifest as noise and low-lying valley states, setting a hard floor on qubit performance. Intel addresses these challenges through tightly controlled epitaxial growth, gate stack engineering, isotopic purification and wafer-scale uniformity, delivering the clean environment required for high-performance spin qubits [1,2]. We further demonstrate small scale 2D arrays of EO qubits, including the mapping of quantum error correction (QEC) d=2-5 repetition code onto a 9-qubit processor. We consider qubit array scaling and performance improvements as distinct challenges, where our customized process-design-kit (PDK) has been leveraged to fabricate larger-scale 2D spin qubit arrays scaling up to several hundred qubits. We further utilize a tight feedback loop consisting of qubit device modeling, integration and characterization - along with control, packaging and software - to codesign various aspects of full stack qubit system capable of demonstrating fault-tolerant quantum error correction. Finally, we propose specifications on the devices, control and packaging using multi-physics models and further quantify the resultant performance of logical qubits encoded with extensible 2D qubit arrays. [1] H. C. George et al., Nano Letters. 25, 2, 793-799 (2025). [2] S. F. Neyens et al., Nature. 629, 80-85 (2024).

量子コンピュータを社会実装へつなげるためには、量子ビットの高性能化だけでなく、数多くの量子ビットを高密度に集積し、制御・読み出し・誤り訂正まで含めたシステムとして実現することが求められます。本講演では、現在の半導体産業を支えるシリコン技術を活用した量子コンピュータに着目し、その基本原理と特徴、研究開発の動向について紹介します。