Dec.17_12:45_Next Generation Semiconductor Technology 1 ~Devices

To address these challenges, CoP (Chip-on-Panel) technology will be introduced to complement current CoW (Chip-on-Wafer) to accelerate 3DIC scale up.  However, this shift requires substantial infrastructure development, especially for tool development and material innovations. Meanwhile, material usage will be significantly increased, raising concerns about supply chain resilience.  
All of which will play a pivotal role in enabling this critical technology expansion and requires seamless collaborations across backend eco-system.

As generative AI continues to evolve, the importance of inference computing is poised to grow steadily. In this session, the speaker Takahiro Ogura will introduce the 3D-stacked memory structure, a technological breakthrough for AI inference chips, and demonstrate its potential for social transformation through AI agents and edge AI. Ogura will also share his company Preferred Networks’s vision for democratization of AI and creation of new paradigms through their proprietary chip design, ecosystem development and industry collaborations.

As you know, NAND Flash is the first device to transform from 2D structure to 3D-staructure. Let’s review the history of how to change from 2D-NAND to 3D-NAND. At the same time, I will share unique challenge of the 3D-NAND scaling and new direction of 3D-NAND

The increasing demands on compute for generative AI and high performance computing (HPC) are driving significant opportunities for semiconductor innovation. IBM’s logic roadmap has moved the industry forward with novel materials and architectures and is accelerating its progress in collaboration with a rich ecosystem of partners based in Albany, NY. This talk will highlight IBM’s innovation and ecosystem development for advanced semiconductors towards sustainable GenAI and HPC applications.